1. Field
Embodiments described herein relate to an electrically-rewritable nonvolatile semiconductor memory device.
2. Description of the Related Art
A NAND type flash memory has a memory cell array which is configured by arranging memory strings each including a plurality of memory cells connected in series. Both ends of each memory string are connected to a bit line and a source line through select transistors respectively. The control gate electrodes of the memory cells of each memory string are connected to different word lines respectively. In each memory string, the plurality of memory cells are connected in series with sources and drains shared between them. The NAND type flash memory can have a small unit memory cell size, because select transistors and their bit line contacts and source line contacts are shared among a plurality of memory cells. Further, the NAND type flash memory is suitable for miniaturization, because the word lines and the device regions of the memory cells have a shape that resembles a simple stripe shape, and hence a flash memory having a large capacity is realized.
As the miniaturization of NAND type flash memories progresses, interference between adjoining cells and influence due to elapse of time after data writing increase, which might change the memory cell data. For example, when data written in a memory cell remains un-accessed for a long time, there occurs a phenomenon that electrons are discharged from the charge accumulation layer of the memory cell, changing the threshold voltage of the memory cell to a lower value. Hereinafter, this phenomenon will be referred to as deterioration of data retention. If deterioration of data retention occurs, a data reading operation may fail.